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Increasing power densities in data centers due to the rise of Artificial Intelligence (AI), high-performance computing (HPC) and machine learning compel engineers to develop new cooling strategies and designs for high-density data centers. Two-phase cooling is one of the promising technologies which exploits the latent heat of the fluid. This technology is much more effective in removing high heat fluxes than when using the sensible heat of fluid and requires lower coolant flow rates. The latent heat also implies more uniformity in the temperature of a heated surface. Despite the benefits of two-phase cooling, the phase change adds complexities to a system when multiple evaporators (exposed to different heat fluxes potentially) are connected to one coolant distribution unit (CDU). In this paper, a commercial pumped two-phase cooling system is investigated in a rack level. Seventeen 2-rack unit (RU) servers from two distinct models are retrofitted and deployed in the rack. The flow rate and pressure distribution across the rack are studied in various filling ratios. Also, investigated is the transient behavior of the cooling system due to a step change in the information technology (IT) load. 

Recent commercial efforts have reestablished the benefits of cooling server modules using direct liquid cooling (DLC) technology. The primary drivers behind this technology are the increase in chip densities and the absolute need to reduce the overall data center power usage. In DLC technology, a cold plate is situated on top of the chip with thermal interface material between the chip and the cold plate. The low thermal resistance path facilitates the use of warm water which helps data centers in replacing the chilled water system by a water side economizer utilizing ambient temperature. This work describes the effort to leverage DLC by employing microchannel cold plates to cool multi-chip modules. The primary objective of this work is to build a sophisticated test rig to characterize the flow and thermal performance of a microchannel cold plate for cooling a two-die chip. This study highlights the challenges of building an experimental setup which simulates a two-die chip package and the approaches taken to overcome the challenges. A parallel channel cold plate is used to benchmark the performance. Tests were conducted for a set of independent variables like flow rate, input power to dice, coolant temperature, flow direction and TIM resistance. The results are presented as PQ curves, specific thermal resistance curves and case temperature distribution reflecting the effect of changing the input variables.